ROMJIST Volume 25, No. 2, 2022, pp. 179-204
Iulian SULAREA, Cristian RĂDUCAN, Marius NEAG High Power Supply Rejection Capacitor-less Low Dropout Regulators Based on High Slew Rate Symmetrical Operational Transconductance Amplifiers
ABSTRACT: This paper introduces a power supply rejection (PSR) enhancement technique for capacitor-less low dropout (LDO) voltage regulators with PMOS pass transistor. The main idea for enhancing the PSR is to create a feed forward signal path, so that variations of the supply line result in a current injected directly into the node at the gate of the pass transistor which cancels the effect of the unwanted signal paths between the input and output of the LDO. Circuit implementation is based on an additional OTA that senses the supply variations by using a high pass filter and generates the cancelling signal current. The technique is demonstrated on two LDOs with different error amplifiers based on symmetrical operational transconductor amplifiers with high Slew-Rate. Both LDOs are designed in a 0.18µm standard CMOS process and provide a regulated 1.5V output voltage for load currents up to 50mA, while burning only 22µA. These LDOs exhibit PSR values better than -40dB at 1MHz at a maximum load current of 50mA, for values of the load capacitor between 10pF to 1nF and dropout voltages as low as 300mV. A new Figure of Merit was introduced to compare their performance against LDOs with similar design requirements.KEYWORDS: Capacitor-less LDO, class-A symmetrical OTA, class-AB symmetrical OTA, high SR symmetrical OTA, PSR enhancerRead full text (pdf)